Default DAC setting

GNU Radio
1

Dear all,

What’s the default setting, if python doesn’t write any register in
AD9862. For example, in gr-sounder project there isn’t any configuration
for AD9862 chip.

Thanks in advance

Regards,
Yan

2

On Tue, Jan 19, 2010 at 07:03:37AM +0800, Yan N. wrote:

Dear all,

What’s the default setting, if python doesn’t write any register in
AD9862. For example, in gr-sounder project there isn’t any
configuration for AD9862 chip.

Thanks in advance

Regards,
Yan

gr-sounder (sounder.py) uses usrp.sink_s to talk to the USRP, thus it
uses the default values that are written by usrp_basic* and
usrp_standard*

Look in usrp/host/lib/usrp_{basic,standard}.cc for the details.

Eric

3

----- Original Message -----
From: Eric B. [email protected]
Date: Monday, January 18, 2010 9:09 pm
Subject: Re: [Discuss-gnuradio] default DAC setting
To: Yan N. [email protected]
Cc: [email protected]

Regards,
Yan

gr-sounder (sounder.py) uses usrp.sink_s to talk to the USRP,
thus it
uses the default values that are written by usrp_basic* and
usrp_standard*
Look in usrp/host/lib/usrp_{basic,standard}.cc for the details.

Eric

Hi,

Thank you Eric. I looked at the usrp_basic.cc file, and have several
questions on it.

  1. the default AD9862 reg setting is in the following, is it correct?
    master clock for FPGA:Â 64MHz;
    sample_rate going to D/A: 128MHz / 4 ;
    Tx out puts will be static and Tx analog power down;
    DAC A Offset is 0;
    the output current is not scales ;
    No gain adjustment for the DAC output curve;
    TxPGAÂ gain is maximum gain: 0 dB;
    DAC input rate 64MHz;
    NCO disabled;
    coarse modulator disabled ’
    interpolate 4x;
    zero Tx Auto Tansmit/Receive reg;

  2. Why the DAC input rate is 64MHz but the sample_rate is 32MHz. If the
    sample_rate is the Nyquist frequency, the tx data rate should be lower
    than 16MHz, but here the DAC input rate is 64MHz, why?

  3. What’s the difference among functions tx_tune(target_freq),
    set_tx_freq(target_freq), and using fine modulation in DAC?
    What’s the difference among these three approach for shifting the data
    in baseband to RF in pass band?

Thanks in advance.

Regards,
Yan

4

On Fri, Jan 22, 2010 at 12:50:14PM -0500, Yan N. wrote:

Hi,

Thank you Eric. I looked at the usrp_basic.cc file, and have several questions on it.

Hi Yan,

Be sure to look at usrp_standard.cc too. It sets some additional
AD9862 parameters.

  1. the default AD9862 reg setting is in the following, is it correct?
    master clock for FPGA: 64MHz;
    sample_rate going to D/A: 128MHz / 4 ;

Yes.

NCO disabled;
coarse modulator disabled ’

These get set in usrp_standard_tx::set_tx_freq.

interpolate 4x;

Yes.

zero Tx Auto Tansmit/Receive reg;

That’s the initial value. The daughterboard code initializes it
depending on what kind of daughterboard is installed.

  1. Why the DAC input rate is 64MHz but the sample_rate is 32MHz. If
    the sample_rate is the Nyquist frequency, the tx data rate should be
    lower than 16MHz, but here the DAC input rate is 64MHz, why?

The I & Q samples are multiplexed over the same bus on the way to the
DAC.

This gives a complex baseband rate to the DACs of 32MS/s.

  1. What’s the difference among functions tx_tune(target_freq),
    set_tx_freq(target_freq), and using fine modulation in DAC? What’s
    the difference among these three approach for shifting the data in
    baseband to RF in pass band?

From usrp_standard_tx:

/*!

  • \brief High-level “tune” method. Works for the single channel
    case.
  • This method adjusts both the daughterboard LO and the DUC so that
  • DC in the complex baseband samples ends up at RF target_freq.
  • \param chan which DUC channel we’re controlling (usually ==
    which_side).
  • \param db the daughterboard we’re controlling.
  • \param target_freq the RF frequency we want our baseband translated
    to.
  • \param[out] result details how the hardware was configured.
  • \returns true iff everything was successful.
    */
    bool tune(int chan, db_base_sptr db, double target_freq,
    usrp_tune_result *result);

/*!

  • \brief set the frequency of the digital up converter.
  • \p channel must be in the range [0,1]. \p freq is the center
  • frequency in Hz. It must be in the range [-44M, 44M].
  • The frequency specified is quantized. Use tx_freq to retrieve
  • the actual value used.
    */
    virtual bool set_tx_freq (int channel, double freq); // chan: [0,1]

The daughterboard set_freq method (db_base.h) tunes only the front
end. Note that the VCOs have discrete steps, and this method gets as
close as it can and returns information about how close it got.

set_tx_freq adjusts the coarse and fine modulator in the AD9862.
This is used to compensate for the discrete steps of the front end.

tune adjusts both of them so that 0 Hz in the complex baseband ends up
at RF target_freq.

Eric

5

Thank you so much Eric. I’ve another questions can the DAC data input
frequency be slow down to 25kHz? or make the frequency of data
transmitted from FPGA be slow down to 25kHz? How can I make it?
Thanks in advance.
Regads,
Yan

6

On Fri, Jan 22, 2010 at 04:47:12PM -0500, Yan N. wrote:

Thank you so much Eric. I’ve another questions can the DAC data
input frequency be slow down to 25kHz? or make the frequency of data
transmitted from FPGA be slow down to 25kHz? How can I make it?

No.

You can however use the interpolator inside the FPGA
(Digital-Up-Converter, DUC) to do part of the work, then interpolate
in software for the remainder.

Please read the USRP FAQ:

http://gnuradio.org/redmine/attachments/129/USRP_Documentation.pdf

and look at this page:

http://gnuradio.org/redmine/wiki/gnuradio/UsrpRfxDiagrams

Eric