Hi,
I noticed that there is a hardcoded “`define NOCORDIC_TX” inside
tx_chain.v
Does anyone know why this is disabled?
Is it a problem of FPGA size or are there any bugs inside tx_chain with
NOCORDIC_TX not defined?
Christian
Hi,
I noticed that there is a hardcoded “`define NOCORDIC_TX” inside
tx_chain.v
Does anyone know why this is disabled?
Is it a problem of FPGA size or are there any bugs inside tx_chain with
NOCORDIC_TX not defined?
Christian
Hi once more,
I am currently writing a patch that reactivates the disabled and out of
date integration of the tx cordic inside FPGA.
If this works and fits into the FPGA, I plan to use it for getting more
tx and rx channels over the same daugtherboard with different baseband
offsets.
For this to work the tx and rx pipelines of a 2rx + 2tx configuration
have to be combined after tx_chain / before rx_chain.
This is done in a tx_combiner module.
Find attached the current progress as a patch.
I haven’t neither tested nor synthesized it yet at all. I just wanted to
give a base for discussion.
If someone has any comments or further ideas on that, please let me
know.
By the way, what is the firmware/fpga_regs0.h file good for? I didn’t
find any file that uses these defines, or any .v file that includes
fpga_regs0.v.
For the patch to compile we also need some new register definitions of
FR_TX_(FREQ|PHASE)_[01] and FR_TX_COMBINER.
What do you think of this idea?
Thanks
Christian
Christian Meier wrote:
Hi,
I noticed that there is a hardcoded “`define NOCORDIC_TX” inside tx_chain.vDoes anyone know why this is disabled?
Is it a problem of FPGA size or are there any bugs inside tx_chain with
NOCORDIC_TX not defined?
That is commented out. We use the CORDIC.
Matt
Christian Meier wrote:
Hi,
I noticed that there is a hardcoded “`define NOCORDIC_TX” inside tx_chain.vDoes anyone know why this is disabled?
Is it a problem of FPGA size or are there any bugs inside tx_chain with
NOCORDIC_TX not defined?
Ignore my last answer. We use the RX cordic. The TX cordic is not used
because there is the equivalent functionality in the AD9862 DAC, so we
don’t need to include it in the FPGA, and thus can save space.
Matt
Matt E. wrote:
Ignore my last answer. We use the RX cordic. The TX cordic is not
used because there is the equivalent functionality in the AD9862 DAC,
so we don’t need to include it in the FPGA, and thus can save space.Matt
Hi once more,
I am currently writing a patch that reactivates the disabled and out of
date integration of the tx cordic inside FPGA.
If this works and fits into the FPGA, I plan to use it for getting more
tx and rx channels over the same daugtherboard with different baseband
offsets.
For this to work the tx and rx pipelines of a 2rx + 2tx configuration
have to be combined after tx_chain / before rx_chain.
This is done in a tx_combiner module.
Find attached the current progress as a patch. [Update: posting did not
work with attached file ;(]
I haven’t neither tested nor synthesized it yet at all. I just wanted to
give a base for discussion.
If someone has any comments or further ideas on that, please let me
know.
By the way, what is the firmware/fpga_regs0.h file good for? I didn’t
find any file that uses these defines, or any .v file that includes
fpga_regs0.v.
For the patch to compile we also need some new register definitions of
FR_TX_(FREQ|PHASE)_[01] and FR_TX_COMBINER.
What do you think of this idea?
Thanks
Christian
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