Clock input level

Hi,

What is the voltage level for the USRP external clock? Is 1V peak to
peak ok? I am planning to drive the board using a high accuracy
reference clock.

juha

I looked it up from the schema. It seems that a basic 1V peak to peak
should be fine.

juha

Just a follow up about the external clock. We tested a USRP in our
radar measurement campaign with great success. We used a DDS generated
external clock that was syncronized to the system reference and
everything just worked. Even after ten hours of continuous sampling at
2MHz, I couldn’t see any missing or extra samples.

As a feature request for the next rev of USRP: it would be really nice
to switch between external and internal clock using jumpers.

And one question: is it possible to pay somebody for implementing or
helping to implement features? We would like a small feature that
writes the state of a BasicRX digital i/o bit into the least
significant bit of the Q samples. I was looking at the vhdl and it
seems to me that it would be possible to do so with small
modifications to the code, I just lack the experience, skills and time
to make it happen.

Also, it would be nice to do the opposite, i.e., output the value of
the least significant bit of the TX Q samples into the digital i/o
pins. These kinds of features would increase the usefulness of USRP
for radar applications, as these signals could be used, e.g., to read
the state of the radar (is it transmitting or receiving).

BR,
juha