ADC clarification in verilog of usrp2

GNU Radio
1

Hi,

I just want to ask a very simple question.
The i & q samples on the fpga design that come out of dsp_core_rx are
in 2’s complement or in sign & magnitude notation?

–
Matteo

2

On 09/09/2010 08:41 AM, Matteo Carucci wrote:

Hi,

I just want to ask a very simple question.
The i& q samples on the fpga design that come out of dsp_core_rx are
in 2’s complement or in sign& magnitude notation?

Everything we do is 2’s comp