Hello list,
We are planning to do some experiments with USRP E100. One advantage of
E100
that we are excited with is that
“The user can choose (at run time) a convenient clock rate”.
Our question is:
- When we change the clock rate changed, is the main clock rate
changed, or
is it just change in the decimation rate?
We are asking this because we are interested in the energy consumption
of
USRP E100. The energy consumption is likely to be reduced if the main
clock
rate is reduced, but unlikely to be reduced if it’s just change in
decimation rate.
- How long does it take for the USRP E100 to stablize from one clock
rate
to another?
Could you help clarify the problem if you know about the USRP E100?
Thanks!!
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On 01/10/2011 09:25 AM, Miok Wah wrote:
We are asking this because we are interested in the energy consumption of
USRP E100. The energy consumption is likely to be reduced if the main clock
rate is reduced, but unlikely to be reduced if it’s just change in
decimation rate.
There are two clock rates to consider: there is the fpga clock rate
which is settable via uhd. I’m not good enough at fpga’s to know how
much power can be saved this way.
The OMAP3 clock circuitry allows sections of the OMAP to be turned off,
or clocked at lower rates to save power. This is how they use this chip
in mobile devices. That said, the kernel and user space provided with
the E100 has the clock rate set to the max possible and does not take
advantage of the OMAP power saving features. It should be possible to do
work in this area with the E100 though. There is lots of activity on the
linux-omap kernel mailing list in the power management area.
Philip
Hi,
On Mon, Jan 10, 2011 at 23:03, Philip B. [email protected]
wrote:
We are asking this because we are interested in the energy consumption of
clocked at lower rates to save power. This is how they use this chip in
mobile devices. That said, the kernel and user space provided with the E100
has the clock rate set to the max possible and does not take advantage of
the OMAP power saving features. It should be possible to do work in this
area with the E100 though. There is lots of activity on the linux-omap
kernel mailing list in the power management area.
What about ADC/DAC clock rates?
–
Regards,
Alexander C…
Hi Philip,
Thanks a lot for your kind help!
From the description here:
http://elinux.org/OMAP_Power_Management#DVFS:_Dynamic_Voltage_and_Frequency_Scaling
I see that it’s possible to change the operating frequency of the OMAP
using
certain commands.
Do you know if E100 supports such commands?
Thanks again!
Philip B. wrote:
advantage of the OMAP power saving features. It should be possible to do
work in this area with the E100 though. There is lots of activity on the
linux-omap kernel mailing list in the power management area.
Philip
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As far as I know, the decimation is after the ADC, so ADC rate doesn’t
change
after changing the clock rate. I’m happy to be corrected if it’s not
so. 
Alexander C. wrote:
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As far as I know, the decimation is after the ADC, so ADC rate doesn’t change
after changing the clock rate. I’m happy to be corrected if it’s not so.
That’s correct. The ADC rates are fixed across all the products. That
vastly simplifies things both in the FPGA
DDC+CIC decimators, and the analog interface in front of the ADC.
–
Marcus L.
Principal Investigator
Shirleys Bay Radio Astronomy Consortium
As it is currently set up, there are only 2 clock rates. The OMAP
processor can run at up to 720 MHz. This clock rate is independent of
the FPGA, ADC, and DAC clocks.
The ADC clock can run as high as 64 MS/s. The DAC always runs at
exactly double the rate of the ADC. The FPGA is normally running at the
same speed as the ADC, but you could conceivably run at 2x or 1.5x if
you want to go faster, or a number of speeds if you want to go slower.
We have not tried changing the FPGA/ADC/DAC clock during normal
operation, but I don’t think it would be worth the trouble to change it
dynamically.
Matt
Hey Matt,
Thanks a lot for your help. Could you explain how to slow down the
FPGA/ADC
rate? How should we modify the firmware? Which part of the code should
we
look into? Thanks!
Matt E. wrote:
We have not tried changing the FPGA/ADC/DAC clock during normal
operation, but I don’t think it would be worth the trouble to change it
dynamically.
Matt
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On 01/11/2011 03:35 PM, Miok Wah wrote:
Do you know if E100 supports such commands?
We haven’t done any work with pm stuff on the E100. I suspect that it
would be possible to build a kernel with support for the omap pm stuff,
but I do not know how well it would work. Our efforts to date are
focused on getting things to run as fast as possible.
All that said, I do not want to discourage people from experimenting
with the power management features of the omap3 on the E100.
Philip
Hi Matt,
Thank you for your clarification.
What are the limits and steps/accuracy of ADC/DAC clock speed
regulation?
E.g. is it possible to sample at 56MHz or 26 MHz and set sampling
clock with 1Hz precision?
On Wed, Jan 12, 2011 at 00:16, Matt E. [email protected] wrote:
We have not tried changing the FPGA/ADC/DAC clock during normal operation,
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Regards,
Alexander C…
Thanks a lot for your help. Could you explain how to slow down the FPGA/ADC
rate? How should we modify the firmware? Which part of the code should we
look into? Thanks!
This is a host code modification.
see the clock_ctrl.cpp in host/lib/usrp/usrp_e100/
http://code.ettus.com/redmine/ettus/projects/uhd/repository/revisions/master/entry/host/lib/usrp/usrp_e100/clock_ctrl.cpp
You will want to manipulate codec clock.
-Josh
Hi Josh,
Thanks a lot for your help! We will try this after our E100 order
arrives.
Josh B.-3 wrote:
This is a host code modification.
[email protected]
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On 01/11/2011 10:18 PM, Alexander C. wrote:
Hi Matt,
Thank you for your clarification.
What are the limits and steps/accuracy of ADC/DAC clock speed regulation?
E.g. is it possible to sample at 56MHz or 26 MHz and set sampling
clock with 1Hz precision?
You cannot get 1 Hz steps.
See Sample rate vs. symbol time issue & E100 "Flexible Clocking" (more info please) - GNU Radio - Ruby-Forum for a fuller explanation.
Matt