i have a question about maximum bandwidth of sender signal for
transmitting and receiving.
the half bandwidth of maximum USB is 4MHz for Decimator 16 or
32, am i right?
i will use the setting decim = 16 and interp = 32 for simultaneous
transmitting and receiving. There is a CIC Interpolator in the FPGA for
transmitting side. after the interpolator must eliminate the
but i do not know the cutoff frequency of the interpolator filter. so i
want to know the maximun bandwidth of sender signal. can anyone help?
thanks you very much!
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