Forum: GNU Radio FPGA signal processing

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1948ea1fa62dcb8ca83bf69b63826f7a?d=identicon&s=25 Roberto Mastrodonato (Guest)
on 2007-01-30 10:56
(Received via mailing list)
Hi all

has someone of you ever used SynplifyDSP tool (Synplicity) or System
Generator (Xilinx)? If yes, do you have some FPGA signal processing
example
upon USRP boards? How can the generated code (with previous tools)
interact
with the VHDL code already being in the USRP normal working?

10x a lot

Roberto
79723aa1b24981dcec2dbf7fd59403c1?d=identicon&s=25 Brian Padalino (Guest)
on 2007-01-30 18:24
(Received via mailing list)
On 1/30/07, Roberto Mastrodonato <rmastro@gmail.com> wrote:
> has someone of you ever used SynplifyDSP tool (Synplicity) or System
> Generator (Xilinx)?

Since the USRP uses an Altera Cyclone FPGA, you should be checking out
their DSP Builder software - found here:

  http://www.altera.com/products/software/products/d...

(NOTE: Requires MATLAB w/ Simulink)

> How can the generated code (with previous tools) interact
> with the VHDL code already being in the USRP normal working?

The code generated by those systems would just be another
instantiation within the FPGA project.  It could probably hook up
between the FIFOs that are used for shuffling the data around, but
Matt would be the authority to really check with.

Brian
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