Hi!
I am working in a DAB digital radio project, and i am interested to
implement the USRP 1 in the development board “XtremeDSP kit IV”
(Nallatech). It board uses an Virtex 4 FPGA and have an PCI
interface. My idea is to use the PCI interface of the board to send
the data to the PC, and utilize the ADC’s tha the board includes. I
have the C++ api to control the PCI interface in the PC and have a
Xilinx core to implement the PCI interface. I well be grateful to
someone that help me to do this.
–
Imagination is more important than knowledge - Albert Einstein
On Thu, Feb 05, 2009 at 09:34:57AM -0600, Pablo M. wrote:
Hi!
I am working in a DAB digital radio project, and i am interested to
implement the USRP 1 in the development board “XtremeDSP kit IV”
(Nallatech). It board uses an Virtex 4 FPGA and have an PCI
interface. My idea is to use the PCI interface of the board to send
the data to the PC, and utilize the ADC’s tha the board includes. I
have the C++ api to control the PCI interface in the PC and have a
Xilinx core to implement the PCI interface. I well be grateful to
someone that help me to do this.
OK. So what questions do you have? It’s doubtful that many of the
others of us have the same h/w as you, so at best we can answer
questions. You’ll need to be a lot more specific than “how do I do
this?”
Eric
The exact question is: Were, in the python code of the GnuRadio core,
can I insert the Driver that i mention? I am reading the python code
but i can not find were the code read/send data to the USB (to
substitute it with the PCI control code). The other question is were
in the Verilog Code can I insert the PCI interface control.
Thanks
–
Imagination is more important than knowledge - Albert Einstein
Pablo-
The exact question is: Were, in the python code of the GnuRadio core,
can I insert the Driver that i mention? I am reading the python code
but i can not find were the code read/send data to the USB (to
substitute it with the PCI control code). The other question is were
in the Verilog Code can I insert the PCI interface control.
The better approach is to run USB to your board and PCI to the host PC.
Then the
problem is reduced to a PCI driver substitute under GNU Radio –
basically a patch.
A medium-complexity FPGA on the board can handle this.
If the board also supports GbE interface, then the same approach works
for USRP2.
-Jeff
On Thu, Feb 5, 2009 at 8:15 AM, Pablo M. [email protected]
wrote:
The exact question is: Were, in the python code of the GnuRadio core,
can I insert the Driver that i mention? I am reading the python code
but i can not find were the code read/send data to the USB (to
substitute it with the PCI control code). The other question is were
in the Verilog Code can I insert the PCI interface control.
If you have a Linux library supplied by the manufacturer for
interfacing with the board, then you can write a C++ wrapper to create
custom GNU Radio source and sink blocks. Then you would use these
blocks instead of the USRP sources and sinks in your Python scripts.
This is not trivial, but is straightforward provided you have the
relevant C++ programming background. It’s essentially the same
approach we use with the USRP itself. There is a low-level interface
library, libusrp (and libusrp2 for USRP2) that provides a raw sample
interface, and then source and sink blocks in gr-usrp(2) wrap these
into a form you can use from Python in your Python scripts.
Having native GNU Radio support for this development system might
interest the manufacturer…perhaps you can contact them about
“supporting” the idea.
Johnathan