Hello,
The LFRX daughterboard on the USRP has 20 dB of gain. I seem to
remember that 10 dB of that gain is from the FPGA. I assume that this
gain is after the ADC? If so, is it really useful?
I relate digital gain to zoom on a digital camera. The analog gain is
the optical zoom and the digital gain is the digital zoom. Digital
cameras have 10x or more digital zoom but it is not really useful. At
high digital zooms you get lower resolution and the picture is blocky.
Optical zoom is more useful as it comes before the digitizer.
So if I have noise values of 35 and signal values of 40 then I get
values of 350 and 400 after the 10 dB digital amplifier. I may see a
higher amplitude signal but how do I gain anything? Am I missing
something?
73 Eric
2007/7/10, Eric C. [email protected]:
Hello,
The LFRX daughterboard on the USRP has 20 dB of gain. I seem to remember that 10 dB of that gain is from the FPGA. I assume that this gain is after the ADC? If so, is it really useful?
I relate digital gain to zoom on a digital camera. The analog gain is the optical zoom and the digital gain is the digital zoom. Digital cameras have 10x or more digital zoom but it is not really useful. At high digital zooms you get lower resolution and the picture is blocky. Optical zoom is more useful as it comes before the digitizer.
So if I have noise values of 35 and signal values of 40 then I get values of 350 and 400 after the 10 dB digital amplifier. I may see a higher amplitude signal but how do I gain anything? Am I missing something?
73 Eric
Hi Eric,
The ADC has a programmable gain stage prior to sampling. Could it be
that one you are thinking of?
Regards,
Trond D.
----- Start Original Message -----
Sent: Wed, 11 Jul 2007 12:38:41 +0200
From: “Trond D.” [email protected]
To: [email protected]
Subject: Re: [Discuss-gnuradio] FPGA Gain?
Hi Eric,
The ADC has a programmable gain stage prior to sampling. Could it be
that one you are thinking of?
Regards,
Trond D.
Hello,
It must be. I thought there was a digital amplifier implemented in the
FPGA. Also I realized that in my example that the problem would be the
lsb error would grow from +/- 1 bit to +/- 10 bits and the resolution
would decrease. The values would be the same for analog or digital.
With the oscilloscope and fft programs I can experiment with gain
settings and see the practical effect. I tend to set the gain to where
the noise floor rises up slightly. I put in a 20 dB amplifier inline to
use the AR5000 with the LFRX so I could keep the gain at 10. Now I can
try a USRP Gain Setting of 11 or even 20 to see what happens. Nigel
would be pleased.
To you RF Engineers, Noise Figure and Gain Distribution are common
mundae design issues. I am still figuring them out.
73 Eric
Eric C. wrote:
The ADC has a programmable gain stage prior to sampling. Could it
be that one you are thinking of?
It must be. I thought there was a digital amplifier implemented in
the FPGA.
The USRP motherboard AD9862 ADC has a programmable analog voltage gain
range from 0 to 20 dB. This results in a full scale input voltage of 2V
peak-to-peak at 0 dB down to 0.2V peak-to-peak at 20 dB. The various
receiver daughterboards of course have their own gain ahead of this.
–
Johnathan C.
Corgan Enterprises LLC
http://corganenterprises.com