# Latest uhd and e100 fpga image seemingly incompatible

**URL:** <https://www.ruby-forum.com/t/latest-uhd-and-e100-fpga-image-seemingly-incompatible/204517>\
**Category:** GNU Radio\
**Created:** [March 14, 2011, 8:05pm UTC](https://www.ruby-forum.com/t/latest-uhd-and-e100-fpga-image-seemingly-incompatible/204517 "2011-03-14T20:05:20Z")\
**Posts on this page:** 2\
**Page:** 1

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**Author:** ![luislavena](https://www.ruby-forum.com/letter_avatar_proxy/v4/letter/l/0ea827/32.png) [@luislavena](https://www.ruby-forum.com/u/luislavena)\
**Post date:** [March 14, 2011, 8:05pm UTC](https://www.ruby-forum.com/t/latest-uhd-and-e100-fpga-image-seemingly-incompatible/204517/1 "2011-03-14T20:05:20Z")

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I completed building and installing uhd and gnuradio on an e100 last  
night  
following the directions here:  
[http://code.ettus.com/redmine/ettus/projects/usrpe1xx/wiki/FAQ](http://code.ettus.com/redmine/ettus/projects/usrpe1xx/wiki/FAQ)

I copied usrp\_e100\_fpga.bin from the tarball here:  
[http://www.ettus.com/downloads/uhd\_images/UHD-images-most-recent/](http://www.ettus.com/downloads/uhd_images/UHD-images-most-recent/) into  
/usr/share/uhd/images/ and rebooted several times (assuming the fpga  
image  
is reloaded on every boot, is this necessary?). When running  
benchmark\_rx\_rate I get the error “Error (usrp-e recv pirate loop): bad  
vrt  
header or invalid packet length” (See below for full runtime log).

I then tried to update manually,

root@usrp-e1xx:/usr/local/share/uhd/usrp\_e\_utils# ./usrp-e-utility  
–fpga  
/usr/share/uhd/images/usrp\_e100\_fpga.bin  
USRP-E Utility loading the FPGA…

Loading FPGA image: /usr/share/uhd/images/usrp\_e100\_fpga.bin… done = 1  
Configuration complete.  
Done!

and reboot but this resulted in the same issue. Any idea why the e100  
fpga  
image is seemingly not compatible with the latest UHD? Thanks!

root@usrp-e1xx:/usr/local/share/uhd/examples# ./benchmark\_rx\_rate  
linux; GNU C++ version 4.5.2 20101204 (prerelease); Boost\_104100;  
UHD\_003.20110310224233.4c7cc6b

Creating the usrp device with: …  
Opening USRP-E on /dev/usrp\_e0  
Loading FPGA image: /usr/share/uhd/images/usrp\_e100\_fpga.bin… done = 1  
Configuration complete.  
re-Opening USRP-E on /dev/usrp\_e0  
USRP-E100 clock control: 6  
r\_counter: 1  
a\_counter: 0  
b\_counter: 12  
prescaler: 8  
vco\_divider: 2  
chan\_divider: 15  
vco\_rate: 1920.000000MHz  
chan\_rate: 960.000000MHz  
out\_rate: 64.000000MHz

Using Device: Single USRP:  
Device: usrp-e device  
Mboard 0: usrp-e mboard  
RX DSP 0: usrp-e ddc0  
RX Channel: 0  
RX Dboard: usrp-e dboard (rx unit)  
RX Subdev: WBX (0x0053)  
TX DSP 0: usrp-e duc0  
TX Channel: 0  
TX Dboard: usrp-e dboard (tx unit)  
TX Subdev: WBX (0x0052)

Testing receive rate 0.500000 Msps (10.000000 second run)  
Error (usrp-e recv pirate loop): bad vrt header or invalid packet length  
Error code: 1  
Unexpected error on recv, exit test…  
Testing receive rate 1.000000 Msps (10.000000 second run)  
Error code: 1  
Unexpected error on recv, exit test…  
Testing receive rate 2.000000 Msps (10.000000 second run)  
Error code: 1  
Unexpected error on recv, exit test…  
Testing receive rate 4.000000 Msps (10.000000 second run)  
Error code: 1  
Unexpected error on recv, exit test…  
Testing receive rate 8.000000 Msps (10.000000 second run)  
Error code: 1  
Unexpected error on recv, exit test…  
Testing receive rate 16.000000 Msps (10.000000 second run)  
Error code: 1  
Unexpected error on recv, exit test…  
Testing receive rate 32.000000 Msps (10.000000 second run)  
Error code: 1  
Unexpected error on recv, exit test…  
Testing receive rate 64.000000 Msps (10.000000 second run)  
Error code: 1  
Unexpected error on recv, exit test…

Warning:  
The hardware does not support the requested RX sample rate:  
Target sample rate: 128.000000 MSps  
Actual sample rate: 64.000000 MSps

Done!

---

<div class="post-metadata">

**Author:** ![Phelps\_W](https://www.ruby-forum.com/letter_avatar_proxy/v4/letter/p/b9bd4f/32.png) [@Phelps\_W](https://www.ruby-forum.com/u/Phelps_W)\
**Post date:** [March 14, 2011, 8:15pm UTC](https://www.ruby-forum.com/t/latest-uhd-and-e100-fpga-image-seemingly-incompatible/204517/2 "2011-03-14T20:15:21Z")

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On 03/14/2011 12:04 PM, Phelps W. wrote:

> 

Actually, it should be rejecting the image you loaded because it needs  
compat 0x3 and that image is 0x2. You sure the latest UHD in installed?

The most recent image for the current master isnt in a package:  
see usrp\_e100\_fpga\_compat3\_feb\_25.bin in  
[http://www.ettus.com/downloads/uhd\_images/UHD-images-most-recent/](http://www.ettus.com/downloads/uhd_images/UHD-images-most-recent/)

See the note at the bottom for this announcement:  
[http://www.ruby-forum.com/topic/1166459](http://www.ruby-forum.com/topic/1166459)

-Josh