# Howto to set the mux in usrp1

**URL:** <https://www.ruby-forum.com/t/howto-to-set-the-mux-in-usrp1/235020>\
**Category:** GNU Radio\
**Created:** [May 26, 2013, 12:01pm UTC](https://www.ruby-forum.com/t/howto-to-set-the-mux-in-usrp1/235020 "2013-05-26T12:01:45Z")\
**Posts on this page:** 2\
**Page:** 1

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**Author:** ![addis\_a](https://www.ruby-forum.com/letter_avatar_proxy/v4/letter/a/c4cdca/32.png) [@addis\_a](https://www.ruby-forum.com/u/addis_a)\
**Post date:** [May 26, 2013, 12:01pm UTC](https://www.ruby-forum.com/t/howto-to-set-the-mux-in-usrp1/235020/1 "2013-05-26T12:01:45Z")

</div>

Hello,

I using a usrp1 populated with 2 LF-RX and 2 LF-TX.  
I want to use 2 DDCs the I-inputs of which are connected to the 2 ADCs  
on LF\_RX A (Q-inputs to gnd).

In pre-uhd times I used to use set\_mux, but now the API seems to have  
changed.  
The following code produces the error message:

AttributeError: ‘uhd\_usrp\_source\_sptr’ object has no attribute ‘set\_mux’

How can I control the mux in the RX-path of the usrp1?

Wolfgang

#!/usr/bin/python

from gnuradio import gr  
from gnuradio import uhd  
from gnuradio.eng\_option import eng\_option

class build\_block(gr.top\_block):  
def **init** (self):  
gr.top\_block. **init** (self)

```
    self.u_tx = 

```

uhd.usrp\_sink(“serial=47432785”,uhd.stream\_args(‘fc32’))  
self.u\_tx.set\_samp\_rate(8.0e6)  
self.siggen\_tx =  
gr.sig\_source\_c(self.u\_tx.get\_samp\_rate(),gr.GR\_CONST\_WAVE,0, 1.0, 0)

# self.head\_tx = gr.head(gr.sizeof\_gr\_complex, 1000000)

```
    self.head_tx = gr.head(gr.sizeof_gr_complex, 1000)
    self.u_tx.set_subdev_spec("A:AB",0)
    self.u_tx.set_center_freq(10e6)

    self.u_rx = 

```

uhd.usrp\_source(“serial=47432785”,uhd.stream\_args(‘fc32’))  
self.u\_rx.set\_mux(gru.hexint(0xf0f0f1f0))  
self.u\_rx.set\_center\_freq(10e6+1e3)  
self.head\_rx\_0 = gr.head(gr.sizeof\_gr\_complex, 1000)  
self.dst0 = gr.file\_sink(gr.sizeof\_gr\_complex, “r.dat”)

# self.di = gr.deinterleave(gr.sizeof\_gr\_complex)

```
    self.connect (self.siggen_tx,self.head_tx, self.u_tx)
    self.connect (self.u_rx,self.head_rx_0,self.dst0)

```

tb = build\_block ()  
tb.run ()

---

<div class="post-metadata">

**Author:** ![Wolfgang\_Buesser](https://www.ruby-forum.com/letter_avatar_proxy/v4/letter/w/d9b06d/32.png) [@Wolfgang\_Buesser](https://www.ruby-forum.com/u/Wolfgang_Buesser)\
**Post date:** [May 26, 2013, 12:05pm UTC](https://www.ruby-forum.com/t/howto-to-set-the-mux-in-usrp1/235020/2 "2013-05-26T12:05:51Z")

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On 05/26/2013 05:00 AM, Wolfgang Buesser wrote:

> How can I control the mux in the RX-path of the usrp1?

Set the subdevice specification to “A:A B:A”. This maps the DDC0 to  
dboard A, frontend A and DDC1 to dboard B, and frontend A.

-josh