# \[ANN\] Ruby-VPI 18.0.1

**URL:** <https://www.ruby-forum.com/t/ann-ruby-vpi-18-0-1/111152>\
**Category:** Ruby\
**Created:** [August 3, 2007, 8:26am UTC](https://www.ruby-forum.com/t/ann-ruby-vpi-18-0-1/111152 "2007-08-03T08:26:48Z")\
**Posts on this page:** 1\
**Page:** 1

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**Author:** ![snk](https://www.ruby-forum.com/letter_avatar_proxy/v4/letter/s/d9b06d/32.png) [@snk](https://www.ruby-forum.com/u/snk)\
**Post date:** [August 3, 2007, 8:26am UTC](https://www.ruby-forum.com/t/ann-ruby-vpi-18-0-1/111152/1 "2007-08-03T08:26:48Z")

</div>

Ruby-VPI is a Ruby interface to IEEE 1364-2005 Verilog VPI  
and a platform for unit testing, rapid prototyping, and  
systems integration of Verilog modules through Ruby. It  
lets you create complex Verilog test benches easily and  
wholly in Ruby.

â€¢ See [http://ruby-vpi.rubyforge.org](http://ruby-vpi.rubyforge.org) for details.

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Project News

The web-based forums[1] have been replaced with a mailing  
list[2] that has its own web-based interface[3] if you prefer.

[1] [http://rubyforge.org/forum/?group\_id=1339](http://rubyforge.org/forum/?group_id=1339)  
[2] [http://ruby-vpi.rubyforge.org/mail/](http://ruby-vpi.rubyforge.org/mail/)  
[3] [http://ruby-vpi.rubyforge.org/forum/](http://ruby-vpi.rubyforge.org/forum/)

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Version 18.0.1 (2007-08-02)

This release fixes some bugs regarding simulation time and  
control.

Thanks

â€¢ Calvin Wong reported the bugs listed in the Repairs  
section.

Repairs

â€¢ VCS does not acknowledge passage of time when  
cbReadWriteSynch callback is used, so I reverted back  
to using the cbAfterDelay callback (as was done in  
version 17.0.0).

â€¢ Ruby-VPI did not give control back to the Verilog  
simulator before it exited. As a result, the Verilog  
simulator did not have a chance to do any clean up or  
finish any pending tasks that remained in the  
simulation.
