# \[ANN\] Ruby-VPI 12.0.0

**URL:** <https://www.ruby-forum.com/t/ann-ruby-vpi-12-0-0/78710>\
**Category:** Ruby\
**Created:** [December 8, 2006, 12:24am UTC](https://www.ruby-forum.com/t/ann-ruby-vpi-12-0-0/78710 "2006-12-08T00:24:01Z")\
**Posts on this page:** 1\
**Page:** 1

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**Author:** ![snk](https://www.ruby-forum.com/letter_avatar_proxy/v4/letter/s/d9b06d/32.png) [@snk](https://www.ruby-forum.com/u/snk)\
**Post date:** [December 8, 2006, 12:24am UTC](https://www.ruby-forum.com/t/ann-ruby-vpi-12-0-0/78710/1 "2006-12-08T00:24:01Z")

</div>

Ruby-VPI is a Ruby interface to Verilog VPI. It lets you create  
complex Verilog test benches easily and wholly in Ruby.

Website: [http://ruby-vpi.rubyforge.org](http://ruby-vpi.rubyforge.org)

Install: gem install ruby-vpi

Version 12.0.0 (2006-12-07)

Summary

This release adds support for the test/spec library, fixes  
some bugs, and improves the user manual and generated  
tests.

Notice

â€¢ Icarus Verilog 0.8 has been demoted to a mostly  
acceptable status.

â€¢ Generated Verilog benches no longer supply the -w  
option to the $ruby\_init task.

â€¢ The ruby-vpi/runner\_proxy library now invokes test  
runners  
â–¡ just before exiting. Thus, you can invoke tasks in  
the main Rakefile before the test runners are  
invoked.  
â–¡ located within any directory that is a descendant  
of the current working directory.

â€¢ The SIMULATOR\_ARGS parameter of generated runners has  
been renamed to SIMULATOR\_ARGUMENTS for clarity.

â€¢ The automated test generator  
â–¡ no longer displays the backup status indicator.  
â–¡ now supplies a third argument to the MERGER  
command.  
â–¡ no longer replaces existing files with newly  
generated content during the update action.  
Instead, it now writes the newly generated output  
to a .new file and then invokes the MERGER command.

Detail

â€¢ The Vpi::Handle class has two new methods: x! and z!,  
which set the handleâ€™s logic value to unknown and high  
impedance respectively.

â€¢ The tests for the simple up-counter example were  
randomly failing because the specifications were not  
asserting the designâ€™s reset signal long enough. So the  
design was getting into weird states and behaving in a  
non-deterministic way. This problem has been fixed.

â€¢ The user manual has been revised and some minor issues  
have been fixed.

Test generation

â€¢ The automated test generator accepts new command-line  
options:  
â–¡ â€”test-unit  
â–¡ â€”test-spec  
â–¡ â€”tspec

â€¢ The automated test generator was crashing when parsing  
module parameters of an input file which did not have  
any module parameters. This has been fixed.

â€¢ Generated Verilog benches now contain simpler clock  
generation code.

â€¢ Generated runners now contain  
â–¡ a :setup task which is invoked before the simulator  
runs. It can be used to make preprations, such as  
converting Verilog header files into Ruby, for the  
simulation.  
â–¡ better explanations to accomodate new users.

â€¢ Specifications generated in the generic format no  
longer contain a class that is instantiated in the  
generated Ruby bench.
