Forum: GNU Radio (no subject)

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Kuntal M. (Guest)
on 2007-03-01 16:33
(Received via mailing list)
hello,

i just got the new usrp board and built the gnuradio with cygwin
installed on windows.....the first program i ran was the usrp_fft.py
on giving a 1MHz input to the Rx, i correctly observed it in the freq
domain, as shown by this program.
thanks for all the help on the site on how to build the radio.

now, my doubt is that, if i want to use the board as a transmitter, say
a 4-bit data generator, or simply, if i want to program my fpga as a
4-bit counter, how can i do that?
i have generated a .rbf file from my verilog code as required but then
how do i program the fpga and observe the output on the CRO??
my aim initially is to program the fpga as a working counter and get the
data from the counter and display it in the time domain as a train of
pulses......plz help me in this regard.

thanks
Sam
Eric B. (Guest)
on 2007-03-01 18:00
(Received via mailing list)
On Thu, Mar 01, 2007 at 06:33:05AM -0800, Kuntal M. wrote:
> hello,
>
> i just got the new usrp board and built the gnuradio with cygwin
> installed on windows.....the first program i ran was the usrp_fft.py
> on giving a 1MHz input to the Rx, i correctly observed it in the
> freq domain, as shown by this program.  thanks for all the help on
> the site on how to build the radio.

Good.

> now, my doubt is that, if i want to use the board as a transmitter,
> say a 4-bit data generator, or simply, if i want to program my fpga
> as a 4-bit counter, how can i do that?  i have generated a .rbf file
> from my verilog code as required but then how do i program the fpga
> and observe the output on the CRO??  my aim initially is to program
> the fpga as a working counter and get the data from the counter and
> display it in the time domain as a train of pulses......plz help me
> in this regard.

We usually handle most things from the host side, including generation
of the waveform to be transmitted.  If you want to write code for the
FPGA, you are certainly welcome to do so, but there is little
documentation available outside of the code itself.

For high-level instructions on how to compile the verilog, please see
usrp/README.  We're using the lastest version of the free Quartus II
web edition.

When using GNU Radio, the host library takes care of loading the .rbf
file into the FPGA for you.  This takes place over the USB.

However, you can manually load the .rbf using the usrper command:

eb@cyan mail]$ usrper --help
usrper: invalid option -- -
usage:
  usrper [-v] [-w <which_board>] [-x] ...
  usrper load_standard_bits
  usrper load_firmware <file.ihx>
  usrper load_fpga <file.rbf>
  usrper write_fpga_reg <reg8> <value32>
  usrper set_fpga_reset {on|off}
  usrper set_fpga_tx_enable {on|off}
  usrper set_fpga_rx_enable {on|off}
  ----- diagnostic routines -----
  usrper led0 {on|off}
  usrper led1 {on|off}
  usrper set_hash0 <hex-string>
  usrper get_hash0
  usrper i2c_read i2c_addr len
  usrper i2c_write i2c_addr <hex-string>
  usrper 9862a_write regno value
  usrper 9862b_write regno value
  usrper 9862a_read regno
  usrper 9862b_read regno


$ usrper load_fpga <name of your .rbf file>

will load the .rbf file into the FPGA.  Please note that it is
possible to permanently damage the USRP by loading buggy code into the
FPGA.

Eric
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