I am real curious as to the ideas that have been thrown out on how to
handle the in-band signaling to the USB and FPGA for the mblock system
currently being worked on.
If this is more appropriate to be off-list, that is fine - but I am
real curious and wouldn’t mind helping out if I could. I know both
VHDL and Verilog, have worked with Xilinx and Altera FPGAs and have
written wideband signal processing blocks for my job.
If there haven’t been many ideas, I wouldn’t mind starting a wiki page
in regards on how to create the transactions.
Myself and another student are working with the platform with the long
term goal of developing fine grained MAC protocols, however we need the
functionality of the m-block and the tighter timing.
Therefore we’ve started our research project with getting in-band
signaling on GNU Radio and the USRP, as Eric is already finishing up the
m-block. We’ve been talking with Eric off-list about what needs to be
modified, the structures, and the approach.
Check out the message from Eric posted to the list on 02/04/07 with the
subject “USRP in-band signaling.” It gives a brief overview of what
needs modified. We’re waiting on Eric and Matt to lay out how they want
things done and their suggestions on approach, then we were going to
hammer it out.
We would love someone with your experience working on it with us, as
Thibaud has ~a years experience with VHDL and I have no experience with
it. Therefore we were going to break it down with Thibaud working
closely on the Verilog and I would be working more closely with the GNU
Radio end.
Our major interest is building the MAC protocols, so we were going to
try and blast through this as fast as possible and with your help and
experience in working with us that may be more realistic We haven’t
done more than played with the USRP and have been reading documentation
and code to understand the interaction of the devices. So, you caught
us at the very start of this which is great.
We haven’t