Forum: GNU Radio strange consume behaviours on input channels

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Matteo C. (Guest)
on 2006-12-26 00:44
(Received via mailing list)
First of all merry xmas to everyone on the list!

I was checking the code for byphase decoding of rds, and I have noticed
that in the ST_LOOKING state the author waits for two valid zero
crossings in the signal, spaced enough to look like symbols, and then
uses the consume function to "rewind" to the beginning of the symbol.
He also tries to put the clock in phase with the signal, trying to
consume enough samples from the clock to align the beginning of the
symbol with the zero crossing of the clock.

I have added a couple debugging fstreams, and what I get is that the
consume on the data input works ok, while the consume on the clock does
not; any explanation for this behaviour?

I am attaching a couple data files, aftersync and beforesync; they are
gnuplot ready and show what happens before and after consume.

The code responsible for looking state is copied below.

best regards
Matteo iz2eeq


 case ST_LOOKING:
		// adjust clock and signal; if fine: go locked
		if(d_sign_last == 0) { d_sign_last = (in[0] > 0 ? 1 : -1); }
		for( i = 0; i < n_in; i++) {

			filetwo << i << " " << in[i] << " " << clk[i] << '\n';

			sign_current = (in[i] > 0 ? 1 : -1);
			if(sign_current != d_sign_last) {
				// Remember the zero crossing and check next time if it was a half
or a whole symbol...
				#ifdef BIPHASE_VERBOSE
					printf("Zero Crossing at i = %d\n", i);
				#endif
				if(d_last_zc != 0) {
					int delta = i - d_last_zc;
					#ifdef BIPHASE_VERBOSE
						printf("Delta of Zero Crossing = %d\n", delta);
					#endif
					if((delta  >= SYMBOL_LENGTH - 5)) {
					//if(abs(delta-SYMBOL_LENGTH)<20) {
						// That was a 1, 0 or 0, 1 in signal; i is now pointing the middle
of a symbol
						#ifdef BIPHASE_VERBOSE
							printf("sync... consume: %d\n",  (i-(delta/2)) );
						#endif
						consume(0, i-(delta/2));
						// From this point sync clk
	                    d_sign_last = (clk[0] > 0 ? 1: -1);
		                for (i = 0; i < n_clk_in ; i++) {
	    	                sign_current = (clk[i] > 0 ? 1: -1);
	            	        if(sign_current != d_sign_last) {
	            	                // zero crossing in clock
	                   		        consume(1,i);
	                   		        #ifdef BIPHASE_VERBOSE
	                   		        printf("clock sync... consume: %d\n",i);
	                   		        #endif
	                            	break;
	                    	}
	                    	d_sign_last = sign_current;
	                	}
	                    enter_locked();
	                    filetwo.close();
	                    return 0;	// No output produced, but now clock and
signal are synced
					}
				}
				d_last_zc = i;
			}
			d_sign_last = sign_current;
		}
		d_last_zc = d_last_zc - n_in;
		cons = (n_in > n_clk_in ? n_clk_in : n_in );
#ifdef BIPHASE_VERBOSE
	    printf("clock and data consume: %d\n",cons);
#endif
		consume(0, cons);
		consume(1, cons);
		return 0;
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