Forum: GNU Radio Re: CIC Interpolator Filter in the FPGA

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Firas A. (Guest)
on 2009-03-28 16:32
(Received via mailing list)
Hi,


> 32/4=8 in the FPGA (stages ??), am i right?
>
> thanks a lot!
>
> slimchao

See:

http://gnuradio.org/trac/wiki/UsrpFAQ/DDC
http://gnuradio.org/trac/wiki/UsrpFAQ/DUC

BR

Firas
slimchao (Guest)
on 2009-03-29 19:04
(Received via mailing list)
Hi,


> 32/4=8 in the FPGA (stages ??), am i right?
>
> thanks a lot!
>
> slimchao

See:

http://gnuradio.org/trac/wiki/UsrpFAQ/DDC
http://gnuradio.org/trac/wiki/UsrpFAQ/DUC

BR

Firas


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Hi Firas,

thanks! i am sure that a 4 Stage CIC Decimator is in the USRP FPGA DDC
and
4x interpolation in the AD9860  (an interpolation rate of 4x is achieved
using both interpolation filters).  but how many Stage CIC Interpolator
is
in the FPGA at the TX path. i guess also 4 Stage CIC Interpolator in the
FPGA, am i right?? please correct me!

thanks again

slimchao
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