Forum: GHDL Using GHDL to compile to ARM archtecture

Posted by Paulo Costa (Guest)
on 2008-12-24 20:02
(Received via mailing list)
Hello!
I've had the chance to use FPGAs at college last semester, and really
enjoyed it.
Unfortunately, I'm unable to get an FPGA of my own, but I do have an ARM
development kit, and was thinking about using it as a (poor) 
replacement: My
idea is to compile my designs with GHDL, write some native I/O stuff, 
link
them together and run into my ARM kit.

The problem is that I have no idea on how to use GHDL to compile to a
different platform. Since GHDL uses the GCC backend, I suppose it's
possible, but I don't know where to start.

I'd like to hear what do you think about his project, and if you have 
any
ideas on how to set it to use the "ARM backend" instead.

Thank you and Merry Xmas
Paulo
Posted by Tristan Gingold (Guest)
on 2008-12-26 03:49
(Received via mailing list)
On Wed, Dec 24, 2008 at 04:59:55PM -0200, Paulo Costa wrote:
> possible, but I don't know where to start.
> 
> I'd like to hear what do you think about his project, and if you have any
> ideas on how to set it to use the "ARM backend" instead.

I don't really understand what you want to do.
GHDL is a simulator.  You need a full OS to run it.  Why do you want to 
use
it on an ARM ?

Tristan.
Posted by Stephen Leake (Guest)
on 2008-12-26 15:49
(Received via mailing list)
Tristan Gingold <tgingold@free.fr> writes:

>> different platform. Since GHDL uses the GCC backend, I suppose it's
>> possible, but I don't know where to start.
>> 
>> I'd like to hear what do you think about his project, and if you have any
>> ideas on how to set it to use the "ARM backend" instead.
>
> I don't really understand what you want to do.
> GHDL is a simulator.  You need a full OS to run it.  Why do you want to use
> it on an ARM ?

I think he wants to use the ARM as an FPGA simulator, since he doesn't
have a real FPGA to run on. That's not going to work.

One option is to get a small, real FPGA; for about $2,000 you can get
one from Acromag that will work in a Windows PCI box; you need a
carrier card and an FPGA IP module (I use these at work):

http://www.acromag.com/functions.cfm?Category_ID=1&Group_ID=1
http://www.acromag.com/models.cfm?Product_Function_ID=5&Category_ID=2&Group_ID=1

You can get compilers for other languages that will run on the ARM.
Ada is close to VHDL in syntax, but the semantics are quite different;
an FPGA is quite different from a CPU.

--
-- Stephe
Posted by Paulo Costa (Guest)
on 2008-12-26 17:35
(Received via mailing list)
Unfortunaly, I really can't afford an FPGA. Not even a "cheap" one.

Even though I know an FPGA is completely different from a CPU, I was
planning to use it for some quite silly things, and if I could run them 
as a
simulation, that would probably be acceptable.

Since GHDL is also a compiler, I expected I could use it... But I think 
I'm
giving up that idea for now....

Thanks guys.


On Fri, Dec 26, 2008 at 12:48 PM, Stephen Leake <
Posted by David Brown (Guest)
on 2008-12-26 20:45
(Received via mailing list)
On Fri, Dec 26, 2008 at 09:48:15AM -0500, Stephen Leake wrote:

>One option is to get a small, real FPGA; for about $2,000 you can get
>one from Acromag that will work in a Windows PCI box; you need a
>carrier card and an FPGA IP module (I use these at work):

You can get a small, real FPGA for significantly less than that.

<www.digilentinc.com> Has a Nexsys2 for $99 or the Basys for $59.
They include a USB programmer (on board), and come with Windows or
Linux software necessary to use them.  These are based on the Xilinx
Spartan 3E chips.

There is probably something similar based on Actel's chips, but when I
was looking into it, they didn't have free (as in beer) Linux
software.

David
Posted by Sanjay Singh (Guest)
on 2008-12-27 14:26
(Received via mailing list)
> Hello!
> I've had the chance to use FPGAs at college last semester, and really
> enjoyed it.
>   

I presume you used some integrated tool from Xilinx or Altera that did
both VHDL simulation and synthesis with one specific software package?

> Unfortunately, I'm unable to get an FPGA of my own, but I do have an ARM
> development kit, and was thinking about using it as a (poor) replacement: My
> idea is to compile my designs with GHDL, write some native I/O stuff, link
> them together and run into my ARM kit.
>   

Is this ARM kit somehow tied to an FPGA? As I understand ARM its a kind
of MMU-less embedded processor. You can run operating systems on it, but
only ones suitable for embedded applications.

An FPGA is a set of configurable logic cells, and some have other
digital devices on them that the FPGA cells can route signals to.

> The problem is that I have no idea on how to use GHDL to compile to a
> different platform. Since GHDL uses the GCC backend, I suppose it's
> possible, but I don't know where to start.
>   

Are you suggesting building a cross compiler for your ARM kit to run
GHDL? And then building an OS to run on it, and THEN porting GHDL to it?
Thats a tall order, and likely very hard to do, even if it was practical
... see below.


> I'd like to hear what do you think about his project, and if you have any
> ideas on how to set it to use the "ARM backend" instead.
>   

I think you've got some terminology confused here.

First off, GHDL is a VHDL  *SIMULATOR* while the resulting binaries it
produces are "runnable" they themselves have nothing to do with FPGA's
or any VLSI fabrication process. They are only meant to run on the host
platform and be tested for functional or logical correctness by
testbenches etc, ie. that your VHDL does what you want it to do, over as
many test scenarios as your test bench entities can test for.

Once you have proven your design satisfactory, the translation of VHDL
code into a netlist or mask is the job of a synthesis tool, usually
driven by design rules specific to the process or technology in
question. GHDL itself does NOT do synthesis of any kind, but simulation
and design validation is actually the bulk of the work anyway.

===

You seem to be implying that by porting GHDL to ARM with a cross-compile
build, that you are somehow "synthesizing" to ARM, instead of the FPGA's
you used in school.

You're misinterpreting and/or confusing the role of VHDL synthesis of a
design to *actual hardware* with the act of *porting* GHDL to another
processor architecture/OS platform.

The ARM development kit is meant for *software* development. GHDL is
meant for *hardware simulation* on a Unix/Linux platform. Use the ARM
for your embedded platform along with uCLinux or other stripped down OS,
and use GHDL for designing/simulating digital hardware, and assuming
you've written good synthesizable VHDL, then use a synthesis tool for
turning your VHDL into a hardware design targetted at a particular
technology.

===

Just as an aside:

I should also mention that to compile GHDL even on a 32-bit embedded
processor, you'd need to have Ada support, since GHDL itself is written
in Ada, and I don't think the embedded Linux platforms out there support
Ada, only C and C++. You'd have to go to RTEMS for that, and thats
assuming they even support your particular ARM board. So anyway ... I
hope this clears up the confusion.

Hope everyone (and esp. Tristan) had a Merry Christmas, and best wishes
to you all for a hopeful and productive 2009. All you GHDL people rock!

S.
Posted by David Brown (Guest)
on 2008-12-27 18:29
(Received via mailing list)
On Fri, Dec 26, 2008 at 03:23:32PM -0500, Sanjay Singh wrote:

>Is this ARM kit somehow tied to an FPGA? As I understand ARM its a kind 
>of MMU-less embedded processor. You can run operating systems on it, but 
>only ones suitable for embedded applications.

Depends on the particular ARM family.  Any of the modern versions have
regular MMU's, caches, and are roughly as powerful as a desktop PC of
say, maybe 10 years ago.  There are several Linux distributions that
run on these ARM CPUs, and there is a GNAT ARM Linux port.

However, even a new-enough dev-kit design to have an MMU probably
doesn't have enough RAM or storage to host a compiler itself, and in
any case, there isn't much point, since it's going to be rediculously
slow.

But, there are FPGA boards that are cheaper than most of the ARM
dev-kits.

David
Posted by Jean-Christophe Le Lann (Guest)
on 2008-12-31 14:24
(Received via mailing list)
Paulo Costa a écrit :
> Unfortunaly, I really can't afford an FPGA. Not even a "cheap" one.
ok. However, maybe you could be interested to have a look (for the
future) at Armadeus project in France :
http://www.armadeus.com/wiki/index.php?title=Main_Page
On the same board, you get a FPGA (Spartan) and a ARM processor, running
Linux.
> Even though I know an FPGA is completely different from a CPU, I was 
> planning to use it for some quite silly things, and if I could run 
> them as a simulation, that would probably be acceptable.
I personally find your idea interesting !  Replacing SW blocks by HW
accelerators is common, but the opposite is quite rare ! But it
represents much much work I think with poor performances at the end, if
you directly embedd an event-driven VHDL simulator. Keep us informed !

Note that it is not so far from what the community of  so-called
"synchronous languages" (used in aeronautics) tend to do, with a
different approach : from  specification captured in dedicated languages
inspired by synchronous circuits (hence their names), their compilers
are capable of generating mono-threaded embedded C code (plus some
formally proofs on some properties).  The idea is to statically find the
correct ordering between "components", in order to remove the scheduler.
Maybe you have already heard about Esterel or Lustre...If you are
interested, you can have a look at
http://www.irisa.fr/distribcom/benveniste/pub/synch_ProcIEEE_2002.pdf

Happy new year to GHDL list !
Jean-Christophe
Posted by Jason Pyeron (Guest)
on 2008-12-31 15:03
(Received via mailing list)
> ok. However, maybe you could be interested to have a look (for the
> quite rare ! But it represents much much work I think with 
Actually this is done when you need a pin level specification, but the 
draft
design can be quickly designed using complex systems (like perl and 
databases,
openssl, etc.)

> poor performances at the end, if you directly embedd an 
> event-driven VHDL simulator. Keep us informed !
> 

That may have provided us with a intermediate test of our design using 
the same
test cases.

> are interested, you can have a look at 
> https://mail.gna.org/listinfo/ghdl-discuss
> 




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