I am new to the list, but saw the visualization thread posted on November 25th by Tristan. I would love it if GHDL could output, for visualization, block diagrams/hierarchy tree (graphviz, tikz, some other format?) and finite state machines. Does anyone have any idea how feasible something like this may be to incorporate into GHDL? Brian
on 2008-12-11 17:31
on 2008-12-11 19:08
On Thu, Dec 11, 2008 at 11:39 AM, Kendrick Hamilton
<hamilton@sedsystems.ca> wrote:
> Doxygen is starting to develop for VHDL.
Does doxygen actually read my FSM from VHDL, or does it just take some
comments I make and generate from that?
Since GHDL parses the VHDL, I would think it might be feasible to show
the transitions between states for enumerated types being used within
case statements.
The block diagram would just be a nice feature for documentation
generation.
The main issue I have with doxygen is that it's driven by comments and
not by the code. The code gets analyzed, elaborated and synthesized;
the comments do not.
Brian
on 2008-12-11 20:26
Brian Padalino wrote: > Brian > GHDL can generate block hierarchy tree on standard output (text) at simulation time using "--disp-tree" option: http://ghdl.free.fr/ghdl/Simulation-options.html#Simulation-options
on 2008-12-12 06:48
On Thu, Dec 11, 2008 at 08:24:37PM +0100, Sylvere Teissier wrote: > GHDL can generate block hierarchy tree on standard output (text) at > simulation time using "--disp-tree" option: > http://ghdl.free.fr/ghdl/Simulation-options.html#Simulation-options Right. It can also pretty print your vhdl sources, eg: http://ghdl.free.fr/dlx/mux2-behaviour.47.html If you need to extract state machine, first you have to design the algorithm, the implementation shouldn't be very hard. Tristan.