Hi people
Can I please ask a question or two about the HBF? So I know that it
is has 31 taps and what the coefficients look like from reading a bit.
Is it just a lowpass decimation filter from Goodman and Carey’s list?
How does it work? Is it just like a standard FIR filter where the
input gets convolved with the filter taps? Is the decimation achieved
because every second tap is 0? I know that we receive an input value
every 64e6/(decimation/2) from the CIC filter. I know for a
decimation of 16 the hb_strobe is supposed to be 4MHz. I just don’t
know where the last clocking down by 2 is done. I’ve seen this bit of
Verilog:
always @(posedge clock)
begin
start_d1 <= #1 start;
start_d2 <= #1 start_d1;
start_d3 <= #1 start_d2;
start_d4 <= #1 start_d3;
start_d5 <= #1 start_d4;
start_d6 <= #1 start_d5;
start_d7 <= #1 start_d6;
start_d8 <= #1 start_d7;
start_d9 <= #1 start_d8;
start_dA <= #1 start_d9;
start_dB <= #1 start_dA;
start_dC <= #1 start_dB;
start_dD <= #1 start_dC;
end // always @ (posedge clock)
reg mult_en, mult_en_pre;
always @(posedge clock)
begin
mult_en_pre <= #1 phase!=8;
mult_en <= #1 mult_en_pre;
end
assign clear = start_d4; // was dC
wire latch_result = start_d4; // was dC
assign strobe_out = start_d5; // was dD
Can anyone please help?
Thank you in advance.
Sebastiaan
–
Sebastiaan H.
Radar and Remote Sensing Group, University of Cape Town
Tel: +27 83 305 5667