Forum: GNU Radio Halfband filter questions

Announcement (2017-05-07): www.ruby-forum.com is now read-only since I unfortunately do not have the time to support and maintain the forum any more. Please see rubyonrails.org/community and ruby-lang.org/en/community for other Rails- und Ruby-related community platforms.
Sebastiaan H. (Guest)
on 2008-10-10 05:40
(Received via mailing list)
Hi there

I would like to know a thing or two about the HBF at the end of the
rx_chain.  From what it looks, it's a 31-tap lowpass FIR filter with
every second tap being a zero to make it a halfband filter?  Also,
because we're at least decimating by 4 in the CIC and 2 in the HBF, we
have 8 clocks to compute each output, right?  So we're using only one
multiplier to consume little FPGA resources.  From what I've read and
looked at, we have two RAM blocks.  One for the samples currently at
zero taps and one for the samples at non zero taps.  What then happens
then is that we add the two symmetric samples, multiply them by the
filter coefficient and add them to an accumulator this is done 8 times
for one output.  Finally we add the center sample multiplied by
32768/2.  I would just like to know some things about the flow of
samples.  I've done some GTKwave outputs, but it gets hard to follow
at a point.

The two RAMs are for the odd and even samples, so a new sample goes to
position 1 in the even RAM, right?  When we receive a new sample, this
sample goes to position 1 of the odd RAM, right?  So every time we get
a new sample, all the odd samples become even and vice versa as the
samples move through the filter?  Another thing that I thought of is
that there is only 15 odd taps and we have 16 registers declared in
the odd RAM.  Is this because we receive one new sample and hold it
while we perform one cycle of filtering.  When the second sample
arrives, it is buffered here and the previous sample moves into the
filter?  What then happens is that every 8 clocks we accept one sample
into the filter, buffer one and output one sample?

And then just a few other things.

The length of the multiplier is 31 bits because we're multiplying two
15 bit numbers plus the sign bit?
The length of the accumulator is 34 bits (31 bits for the multiplier
output plus log2(8) bits for the additions)?
In the following line:

wire signed [33:0] dout = sum_even +
{{4{middle_data[15]}},middle_data,14'b0}; // We already divided
product by 2!!!!

we only multiply middle_data by 16384.  Why?  Do we scale the output
of the HBF filter by two?

The last question is this:

data_out <= #1 dout[30:15] + (dout[33]& |dout[14:0]);

Is this just the correct way to convert a 34 bit number to a 16 bit one?

Thank you very much in advance.

Sebastiaan

--
Sebastiaan H.
Radar and Remote Sensing Group, University of Cape Town
Tel:  +27 83 305 5667
This topic is locked and can not be replied to.